The 4th Workshop on Virtual Prototyping of Parallel and Embedded Systems (ViPES 2016) will be held at Samos Island, Greece, on July 17th, 2016. ViPES 2016 is associated with the International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS) and is sponsored by the IEEE Computer Society's Technical Committee on Parallel Processing.


Virtual prototyping stands for the development of hardware/software systems without using a real hardware prototype, i.e. no printed circuit board with electronic devices such as processors, field programmable gate arrays, peripherals and other devices is needed. The advantage is the possibility to exchange parts in the system setup with faster turnaround times in comparison to the traditional development process, where a time consuming redesign of the complete board to be done. Since some years, the community exploiting these novel methods has grown as time to market plays a major role in industry. Additionally, the increasing complexity of embedded systems, which are more and more realized as parallel and distributed cyber-physical system, forces to perform a time-consuming design space exploration. For academics virtual prototyping is a hot topic and is used to develop future systems and to enable an outlook into the next generation of embedded systems and devices. The wide range of application scenarios for this type of development includes amongst others automotive, avionics, railway and medicine applications. This workshop targets the domain of virtual prototyping focusing the following topics:

  • Virtual prototyping development tools
  • Methods for virtual prototyping of complex systems
  • Application development with virtual platforms
  • Methods for Hardware / Software Codesign with virtual platforms
  • Design space exploration for parallel and distributed multicore and cyberphysical systems
  • Estimation of system characteristics in an early stage of development
  • Functional verification at a high level of abstraction
  • Methods for modelling of IP cores with SystemC
  • Usage of Architecture Description Languages (ADL) for IP core development


Call for paper available
here PDF